Intel® Arria® FPGA Development Kits

A quick note on some Arria 10 intricacies

A previous article on this blog, “Everything mainline from the ground up”, shows how to build mainline U-boot and Linux for Altera socfpgas. While the Cyclone V and the Stratix 10 are widely used and well supported, much cannot be said about the Arria 10. The Arria 10’s bitstream is separated in two parts: the so-called “peripheral” and “core” bitstreams (the A10 Reference Manual gives more information about this). While a single .sof file may contain both the peripheral and the…

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Achilles Arria 10 SoC SoM board

Arria 10: adding support for the Reflex CES R329 board in Linux

In this article, I will document the process of porting the latest Linux to an Arria 10 board, the Reflex CES R329, and start it using TFTP. Starting the board Hook the BLASTER micro-usb port to your computer. Power-on the board and connect to it using picocom: Your board will boot to Linux. Before it does, interrupt the boot process by pressing on any key. You’re now in U-boot. The printenv command will show you the saved environment variables. By…

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Schematic of the Cyclone V SX SoC Development Board

Socfpga: Everything mainline from the ground up

Altera’s tools for generating U-boot and Linux are a bit messy, outdated at best. For example, last time I checked their auto-generated U-boot dates back to 2014. Let’s try to build and run an up-to-date version of U-boot and Linux. U-boot build First, clone the repository. A variety of defconfigs exist for different boards. For example, building U-boot for the Altera’s Cyclone V development kit: This will result in a u-boot-with-spl.sfp file being created. flash The SoCFPGA boot ROM will…

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About This Site

Technical articles related to the development work performed at the REDS institute, HEIG-VD (Switzerland).

The REDS institute is part of the High School of Engineering, Vaud. Its core skills involve board conception, firmware development and FPGA programming.

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