Rick Wertenbroek

Posts by Rick Wertenbroek

Share a block device between two nodes with OCFS2

Sometimes it can be useful to share a single block device (e.g., HDD or SSD) between multiple nodes (e.g., Linux OSes) with a coherent file system. So that modifications to files on the shared block device by one node are visible to another node. Such file system is called a clustered file system. The difference with a distributed file system is that all the data lies into the single block device, whereas in a distributed file system data is distributed…

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Automated C/C++ Build through GitHub Actions

Have you been wondering how some projects add a small badge to their README that shows the project build status ? Well we will show how to set this up on GitHub. First this is documented in the official GitHub documentation : https://docs.github.com/en/actions/monitoring-and-troubleshooting-workflows/adding-a-workflow-status-badge and here https://docs.github.com/en/actions However, the documentation may seem a bit daunting at first, so let’s make an easy to follow tutorial. Setting up a build workflow For this I will show how to build a very simple…

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Tux by Iwan Gabovitch (gg3po) Licensed under GPLv2

Linux kernel hacking on ZynqUltraScale+ with Petalinux

The ZynqUltraScale+ is a powerful SoC platform combining multi-core ARM64 CPUs and FPGA technology. There are plenty of projects that can take advantage of running a Linux kernel on the ARM64 processor and sometimes they require some degree of kernel hacking. In this post we will setup a build environment to modify the Linux kernel, compile it, and run it rapidly on a ZCU106 development board. For this we want the following : Be able to modify and compile the…

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An ARM single board computer as PCIe card !?! (part 2) a Linux based NVMe drive !

In the previous post we prepared a setup with a FriendlyElec NanoPC-T4 single board computer (SBC) we connected it through PCIe to a host computer. This time we will setup a Pine64 Rockpro64 board which comes with a more convenient PCIe 4x female edge connector instead of an M.2 slot. Both boards are based on the same Hexa-Core Rockchip RK3399 chip. In this post we will explore how to build a custom Linux kernel and load a PCIe endpoint function…

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An ARM single board computer as PCIe card !?! (part 1)

In this blog post series I will show how we can use an ARM single board computer (SBC) as a PCIe card (PCIe endpoint). At REDS when developing PCIe based devices we usually rely on FPGAs, for example to develop FPGA PCIe accelerators. These are often based on existing PCIe cards from AMD (Xilinx) and Intel (Altera). For example the Xilinx Alveo series or Zynq based development boards. To develop accelerators such cards are fine and the development boards allow…

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Tux by Iwan Gabovitch

How to apply patches from the Linux Kernel Mailing List

The Linux Kernel is under constant development and improvement. Everyday patches are submitted to the Linux Kernel Mailing List (LKML). Some of these patches get accepted and merged into the mainline Linux kernel and become available to the user, other patches never do. Sometimes it is useful to get patches from the LKML, for example if you are developing in the kernel or simply because you want to stay at the bleeding edge. Another reason could be that you need…

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FreeRTOS + POSIX on Zynq

FreeRTOS is a popular free and open-source real-time operating system (RTOS) for embedded platforms. It has its own scheduler, tasks, and synchronisation primitives. Writing concurrent applications for FreeRTOS requires to learn the environment and make use of the provided tools. In some cases, a developper might want to port an existing concurrent application written with POSIX interfaces (such as pthreads, semaphores, message queues, etc.). Usually there are two approaches here : Convert everything to FreeRTOS primitives. Write an OS abstraction…

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NVMe emulation in QEMU – Adding custom admin and IO commands

QEMU is a wonderful system emulator capable of running full x86 systems with PCIe and NVMe amongst many other platforms. QEMU is not only versatile, very fast, but also open-source ! At REDS we use QEMU to facilitate development of hardware through emulation, for example emulating FPGA platforms in software before going to real hardware, e.g., Full System Simulation (FSS), Zynq Software-Hardware CoSimulation. The full visibility over the system through emulation make development and debugging very effective. With a QEMU…

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Accessing the RAM of a QEMU Emulated System from another Process

Sometimes it may be of interest to expose the RAM of a hardware platform emulated in QEMU to an outside process, e.g., for monitoring, testing, or co-simulation. The QEMU monitor allows to inspect the memory but is not necessarily the most practical tool when you need to access it from another process, e.g., a C program or an external simulator, maybe Questasim simulating a device written in SystemVerilog. In this post I will show how to make the memory of…

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Adding Build and Version Control Information in FPGA Bitstream

When handling FPGA bitstreams it would be nice to have a way to extract build and version information from them, especially when working with hardware-software designs. After generating a few different versions of a bitstream for a project it can be easy to lose track, especially when the design changes are not just incremental but alternative, e.g., to compare performance between possible implementations. In this post we will look at how to add build and version information to an FPGA…

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Zynq-7000 HW-SW Co-Simulation QEMU-QuestaSim

Introduction This is a step-by-step guide to enable hardware (PL) – software (PS) Co-Simulation with QEMU and QuestaSim for a Vivado Zynq project running a Linux operating system and applications. Being able to simulate the interactions between the software running on the ARM processing system (PS) and the FPGA Programmable Logic (PL) allows for full-system simulation and can help development of drivers as well as embedded software that relies on the PL. Prequisites Linux-based operating system Vivado (this guide uses…

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Running Vivado in the Cloud

Vivado Vivado is one of our main tools when working with FPGAs. However when implementing for big FPGAs such as Kintex/Virtex Ultrascale devices, the processing can take forever when running with a high resource usage. The goal of this article is to show a way to tackle this problem and generate more bitstreams faster. By launching Vivado multiple times in the Cloud on instances of our choice (need 128 CPUs and 2TB of RAM, go ahead, just kidding, but this…

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Running Questasim on any OS through Docker

Questasim When doing HDL simulation Questasim is one of our main tools. However it only runs on Windows and GNU/Linux. Although we  mostly use GNU/Linux machines Questasim is not compatible with all distributions. This mainly because of library version compatibility, albeit this being fixable, it is a pain to do (find out which library is the culprit and which version is needed). So creating a Docker image seems like a good solution. It provides a known fixed environment to Questasim…

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Link with the parallel version of libstdc++ and take advantage of your multi-core processor “for free”

Going from a single threaded program to a parallel version is often a major pain, this is however often needed to take full advantage of modern multi-core processors. Having to work with threads, locks, and shared data structures is often difficult due to the non deterministic behavior of the scheduler and the difficulty in debugging the complex problems that can happen with multi-threading. It should be noted that several algorithms in the C++ library already have a parallel implementation. If…

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About This Site

Technical articles related to the development work performed at the REDS institute, HEIG-VD (Switzerland).

The REDS institute is part of the High School of Engineering, Vaud. Its core skills involve board conception, firmware development and FPGA programming.

Find more at http://www.reds.ch