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Program the DE1-SoC’s FPGA from Linux using Device Tree overlay

When using a SoC-FPGA (SoC coupled with an FPGA for programmable logic) such as the DE1-SoC from Terasic, programming the FPGA can be performed in many different ways: Directly from an FPGA software (Quartus for example) From U-boot before launching the OS From the OS Using this last option allows the FPGA to be reconfigured without having to reboot the OS and with the adequate support, even allows the OS to reconfigure itself to use the newly programmed features of…

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An ARM single board computer as PCIe card !?! (part 2) a Linux based NVMe drive !

In the previous post we prepared a setup with a FriendlyElec NanoPC-T4 single board computer (SBC) we connected it through PCIe to a host computer. This time we will setup a Pine64 Rockpro64 board which comes with a more convenient PCIe 4x female edge connector instead of an M.2 slot. Both boards are based on the same Hexa-Core Rockchip RK3399 chip. In this post we will explore how to build a custom Linux kernel and load a PCIe endpoint function…

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Tux by Iwan Gabovitch

How to apply patches from the Linux Kernel Mailing List

The Linux Kernel is under constant development and improvement. Everyday patches are submitted to the Linux Kernel Mailing List (LKML). Some of these patches get accepted and merged into the mainline Linux kernel and become available to the user, other patches never do. Sometimes it is useful to get patches from the LKML, for example if you are developing in the kernel or simply because you want to stay at the bleeding edge. Another reason could be that you need…

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FreeRTOS + POSIX on Zynq

FreeRTOS is a popular free and open-source real-time operating system (RTOS) for embedded platforms. It has its own scheduler, tasks, and synchronisation primitives. Writing concurrent applications for FreeRTOS requires to learn the environment and make use of the provided tools. In some cases, a developper might want to port an existing concurrent application written with POSIX interfaces (such as pthreads, semaphores, message queues, etc.). Usually there are two approaches here : Convert everything to FreeRTOS primitives. Write an OS abstraction…

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Présentation des travaux de Bachelor de nos étudiants

Durant le mois de septembre, nos étudiants ont présenté leurs travaux de Bachelor sous la direction de leurs professeurs respectifs. Nous leur souhaitons à tous plein succès pour leur avenir ! Professeur Alberto Dassatti Carpita Edoardo – “Amélioration des performances du module GRIDEYE”  Eduardo a évalué et profilé en profondeur le traitement effectué sur un module commercial exécutant Linux sur ARM. Il a pu identifier quelques problèmes et proposer des solutions conduisant à une réduction de la charge des processeurs…

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Retrospective on the SDR Makerspace conference

On the 28th and 29th of November, the REDS institute of the HEIG-VD organized its very first international conference at the Swiss Aéropôle of Payerne on the topic of Software Defined Radio, driven by the SDR Makerspace initiative. Needless to say, the conference was overall a success. I have met motivated and enthusiastic attendees, all gathering around the exciting topic of Software Defined Radios. Industrialists, academicians, experts, hobbyists, and even students were present. As I said, the SDR Makerspace initiative…

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SDR Makerspace Conference

28-29 November 2019, Swiss Aeropole / Payerne (CH) The REDS institute of the Haute École d’Ingénierie et de Gestion of the Vaud canton (HEIG-VD), specialized in the development of high-performance reconfigurable systems, is organizing a conference on Software Defined Radios (SDRs) in the context of SDR Makerspace, a European Space Agency (ESA)-sponsored project. These “software radios” are transceivers that take advantage of the flexibility of software to attain unsurpassed performances in terms of robustness and adaptability, and this turns out…

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About This Site

Technical articles related to the development work performed at the REDS institute, HEIG-VD (Switzerland).

The REDS institute is part of the High School of Engineering, Vaud. Its core skills involve board conception, firmware development and FPGA programming.

Find more at http://www.reds.ch