On Alter-Intel SoCs, there exist a bus connecting directly the FPGA fabric and the SDRAM called FPGA-to-SDRAM. This bus is not shared with any other peripheral and enables high-throughput data transfers between the FPGA and the SDRAM. Typically, you might want to use it for DMA transfers.

By default, this bus might not be enabled and prevents anyone from attempting a single transfer on it. If your FPGA design interfaces with this bus, you might need to enable the bus’ ports manually. In a UBoot prompt, after resetting and enabling the bridges :

bridge enable;

Activate all ports of the FPGA-to-SDRAM bus by writing to the register 0xffc25080 :

mw.l 0xffc25080 0x3fff;

Do not hesitate to make this modifications permanent! If you forget the command, your design won’t work.