Linux

Share a block device between two nodes with OCFS2

Sometimes it can be useful to share a single block device (e.g., HDD or SSD) between multiple nodes (e.g., Linux OSes) with a coherent file system. So that modifications to files on the shared block device by one node are visible to another node. Such file system is called a clustered file system. The difference with a distributed file system is that all the data lies into the single block device, whereas in a distributed file system data is distributed…

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Benchmark of DMA between an FPGA and a Linux userspace on a Zynq

Context As part of a research project, the REDS was mandated to design a system retrieving a data stream from a camera and transferring it to a CPU with the lowest delay. We used a SoC-FPGA board from Xilinx’s Zynq family. This type of device has a CPU core (PS) and a programmable FPGA part (PL). The solution chosen, to meet the need for high throughput, was to use a DMA. This was implemented in the FPGA part (PL) and…

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Program the DE1-SoC’s FPGA from Linux using Device Tree overlay

When using a SoC-FPGA (SoC coupled with an FPGA for programmable logic) such as the DE1-SoC from Terasic, programming the FPGA can be performed in many different ways: Directly from an FPGA software (Quartus for example) From U-boot before launching the OS From the OS Using this last option allows the FPGA to be reconfigured without having to reboot the OS and with the adequate support, even allows the OS to reconfigure itself to use the newly programmed features of…

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Tux by Iwan Gabovitch (gg3po) Licensed under GPLv2

Linux kernel hacking on ZynqUltraScale+ with Petalinux

The ZynqUltraScale+ is a powerful SoC platform combining multi-core ARM64 CPUs and FPGA technology. There are plenty of projects that can take advantage of running a Linux kernel on the ARM64 processor and sometimes they require some degree of kernel hacking. In this post we will setup a build environment to modify the Linux kernel, compile it, and run it rapidly on a ZCU106 development board. For this we want the following : Be able to modify and compile the…

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An ARM single board computer as PCIe card !?! (part 1)

In this blog post series I will show how we can use an ARM single board computer (SBC) as a PCIe card (PCIe endpoint). At REDS when developing PCIe based devices we usually rely on FPGAs, for example to develop FPGA PCIe accelerators. These are often based on existing PCIe cards from AMD (Xilinx) and Intel (Altera). For example the Xilinx Alveo series or Zynq based development boards. To develop accelerators such cards are fine and the development boards allow…

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A guide to compile and install a Xenomai-patched kernel

This tutorial will present how to compile and install a Xenomai-patched Linux kernel. Moreover, we will build Debian packages to ease the installation process. At the time of writing, the most recent stable version of Xenomai is 3.1 and the latest supported Linux kernel version is 4.19.89. However, these instructions should be valid for past and future versions. All the instructions have been executed on a machine running Ubuntu 20.04. Pre-requisites Install the following required packages: Download required files From…

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Zynq-7000 HW-SW Co-Simulation QEMU-QuestaSim

Introduction This is a step-by-step guide to enable hardware (PL) – software (PS) Co-Simulation with QEMU and QuestaSim for a Vivado Zynq project running a Linux operating system and applications. Being able to simulate the interactions between the software running on the ARM processing system (PS) and the FPGA Programmable Logic (PL) allows for full-system simulation and can help development of drivers as well as embedded software that relies on the PL. Prequisites Linux-based operating system Vivado (this guide uses…

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Running Vivado in the Cloud

Vivado Vivado is one of our main tools when working with FPGAs. However when implementing for big FPGAs such as Kintex/Virtex Ultrascale devices, the processing can take forever when running with a high resource usage. The goal of this article is to show a way to tackle this problem and generate more bitstreams faster. By launching Vivado multiple times in the Cloud on instances of our choice (need 128 CPUs and 2TB of RAM, go ahead, just kidding, but this…

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Running Questasim on any OS through Docker

Questasim When doing HDL simulation Questasim is one of our main tools. However it only runs on Windows and GNU/Linux. Although we  mostly use GNU/Linux machines Questasim is not compatible with all distributions. This mainly because of library version compatibility, albeit this being fixable, it is a pain to do (find out which library is the culprit and which version is needed). So creating a Docker image seems like a good solution. It provides a known fixed environment to Questasim…

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About This Site

Technical articles related to the development work performed at the REDS institute, HEIG-VD (Switzerland).

The REDS institute is part of the High School of Engineering, Vaud. Its core skills involve board conception, firmware development and FPGA programming.

Find more at http://www.reds.ch